353 lines
16 KiB
C
353 lines
16 KiB
C
/******************************************************************************
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* *
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* License Agreement *
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* *
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* Copyright (c) 2009 Altera Corporation, San Jose, California, USA. *
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* All rights reserved. *
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* *
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* Permission is hereby granted, free of charge, to any person obtaining a *
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* copy of this software and associated documentation files (the "Software"), *
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* to deal in the Software without restriction, including without limitation *
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* the rights to use, copy, modify, merge, publish, distribute, sublicense, *
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* and/or sell copies of the Software, and to permit persons to whom the *
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* Software is furnished to do so, subject to the following conditions: *
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* *
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* The above copyright notice and this permission notice shall be included in *
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* all copies or substantial portions of the Software. *
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* *
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR *
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, *
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER *
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING *
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER *
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* DEALINGS IN THE SOFTWARE. *
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* *
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* This agreement shall be governed in all respects by the laws of the State *
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* of California and by the laws of the United States of America. *
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* *
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******************************************************************************/
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#ifndef __ALTERA_AVALON_TSE_SYSTEM_INFO_H__
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#define __ALTERA_AVALON_TSE_SYSTEM_INFO_H__
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#include "altera_avalon_tse.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif /* __cplusplus */
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/* Define whole TSE system (dedicated descriptor memory, no shared fifo) */
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#define TSE_SYSTEM_EXT_MEM_NO_SHARED_FIFO(tse_name, offset, msgdma_tx_name, msgdma_rx_name, phy_addres, phy_cfg_fp, desc_mem_name) { \
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tse_name##_BASE + offset, \
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tse_name##_TRANSMIT_FIFO_DEPTH, \
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tse_name##_RECEIVE_FIFO_DEPTH, \
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tse_name##_USE_MDIO, \
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tse_name##_ENABLE_MACLITE, \
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tse_name##_MACLITE_GIGE, \
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tse_name##_IS_MULTICHANNEL_MAC, \
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tse_name##_NUMBER_OF_CHANNEL, \
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tse_name##_MDIO_SHARED, \
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tse_name##_NUMBER_OF_MAC_MDIO_SHARED, \
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tse_name##_PCS, \
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tse_name##_PCS_SGMII, \
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msgdma_tx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_IRQ, \
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TSE_EXT_DESC_MEM, \
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desc_mem_name##_BASE, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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phy_addres, \
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phy_cfg_fp \
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},
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/* Define whole TSE system (program memory as descriptor memory, no shared fifo) */
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#define TSE_SYSTEM_INT_MEM_NO_SHARED_FIFO(tse_name, offset, msgdma_tx_name, msgdma_rx_name, phy_addres, phy_cfg_fp) { \
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tse_name##_BASE + offset, \
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tse_name##_TRANSMIT_FIFO_DEPTH, \
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tse_name##_RECEIVE_FIFO_DEPTH, \
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tse_name##_USE_MDIO, \
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tse_name##_ENABLE_MACLITE, \
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tse_name##_MACLITE_GIGE, \
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tse_name##_IS_MULTICHANNEL_MAC, \
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tse_name##_NUMBER_OF_CHANNEL, \
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tse_name##_MDIO_SHARED, \
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tse_name##_NUMBER_OF_MAC_MDIO_SHARED, \
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tse_name##_PCS, \
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tse_name##_PCS_SGMII, \
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msgdma_tx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_IRQ, \
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TSE_INT_DESC_MEM, \
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TSE_INT_DESC_MEM, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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phy_addres, \
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phy_cfg_fp \
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},
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/* Define whole TSE system (dedicated descriptor memory, use shared fifo) */
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#define TSE_SYSTEM_EXT_MEM_WITH_SHARED_FIFO(tse_name, offset, msgdma_tx_name, msgdma_rx_name, phy_addres, phy_cfg_fp, desc_mem_name, shared_fifo_tx_name, shared_fifo_rx_name) { \
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tse_name##_BASE + offset, \
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tse_name##_TRANSMIT_FIFO_DEPTH, \
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tse_name##_RECEIVE_FIFO_DEPTH, \
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tse_name##_USE_MDIO, \
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tse_name##_ENABLE_MACLITE, \
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tse_name##_MACLITE_GIGE, \
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tse_name##_IS_MULTICHANNEL_MAC, \
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tse_name##_NUMBER_OF_CHANNEL, \
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tse_name##_MDIO_SHARED, \
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tse_name##_NUMBER_OF_MAC_MDIO_SHARED, \
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tse_name##_PCS, \
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tse_name##_PCS_SGMII, \
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msgdma_tx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_IRQ, \
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TSE_EXT_DESC_MEM, \
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desc_mem_name##_BASE, \
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TSE_USE_SHARED_FIFO, \
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shared_fifo_tx_name##_CONTROL_BASE, \
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shared_fifo_tx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_TX_DEPTH_DEFAULT, \
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shared_fifo_rx_name##_CONTROL_BASE, \
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shared_fifo_rx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_RX_DEPTH_DEFAULT, \
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phy_addres, \
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phy_cfg_fp \
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},
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/* Define whole TSE system (program memory as descriptor memory, use shared fifo) */
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#define TSE_SYSTEM_INT_MEM_WITH_SHARED_FIFO(tse_name, offset, msgdma_tx_name, msgdma_rx_name, phy_addres, phy_cfg_fp, shared_fifo_tx_name, shared_fifo_rx_name) { \
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tse_name##_BASE + offset, \
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tse_name##_TRANSMIT_FIFO_DEPTH, \
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tse_name##_RECEIVE_FIFO_DEPTH, \
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tse_name##_USE_MDIO, \
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tse_name##_ENABLE_MACLITE, \
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tse_name##_MACLITE_GIGE, \
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tse_name##_IS_MULTICHANNEL_MAC, \
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tse_name##_NUMBER_OF_CHANNEL, \
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tse_name##_MDIO_SHARED, \
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tse_name##_NUMBER_OF_MAC_MDIO_SHARED, \
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tse_name##_PCS, \
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tse_name##_PCS_SGMII, \
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msgdma_tx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_IRQ, \
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TSE_INT_DESC_MEM, \
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TSE_INT_DESC_MEM, \
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TSE_USE_SHARED_FIFO, \
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shared_fifo_tx_name##_CONTROL_BASE, \
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shared_fifo_tx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_TX_DEPTH_DEFAULT, \
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shared_fifo_rx_name##_CONTROL_BASE, \
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shared_fifo_rx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_RX_DEPTH_DEFAULT, \
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phy_addres, \
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phy_cfg_fp \
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},
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/* Define whole TSE system (dedicated descriptor memory, no shared fifo, enable MDIO sharing on first MAC) */
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/* MDIO sharing not supported for Multi-channel MAC */
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#define TSE_SYSTEM_EXT_MEM_NO_SHARED_FIFO_ENABLE_MDIO_SHARING(tse_name, offset, msgdma_tx_name, msgdma_rx_name, phy_addres, phy_cfg_fp, desc_mem_name, number_of_mac_mdio_sharing) { \
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tse_name##_BASE + offset, \
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tse_name##_TRANSMIT_FIFO_DEPTH, \
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tse_name##_RECEIVE_FIFO_DEPTH, \
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tse_name##_USE_MDIO, \
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tse_name##_ENABLE_MACLITE, \
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tse_name##_MACLITE_GIGE, \
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tse_name##_IS_MULTICHANNEL_MAC, \
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tse_name##_NUMBER_OF_CHANNEL, \
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TSE_ENABLE_MDIO_SHARING, \
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number_of_mac_mdio_sharing, \
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tse_name##_PCS, \
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tse_name##_PCS_SGMII, \
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msgdma_tx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_IRQ, \
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TSE_EXT_DESC_MEM, \
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desc_mem_name##_BASE, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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phy_addres, \
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phy_cfg_fp \
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},
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/* Define whole TSE system (program memory as descriptor memory, no shared fifo, enable MDIO sharing on first MAC) */
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/* MDIO sharing not supported for Multi-channel MAC */
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#define TSE_SYSTEM_INT_MEM_NO_SHARED_FIFO_ENABLE_MDIO_SHARING(tse_name, offset, msgdma_tx_name, msgdma_rx_name, phy_addres, phy_cfg_fp, number_of_mac_mdio_sharing) { \
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tse_name##_BASE + offset, \
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tse_name##_TRANSMIT_FIFO_DEPTH, \
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tse_name##_RECEIVE_FIFO_DEPTH, \
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tse_name##_USE_MDIO, \
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tse_name##_ENABLE_MACLITE, \
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tse_name##_MACLITE_GIGE, \
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tse_name##_IS_MULTICHANNEL_MAC, \
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tse_name##_NUMBER_OF_CHANNEL, \
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TSE_ENABLE_MDIO_SHARING, \
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number_of_mac_mdio_sharing, \
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tse_name##_PCS, \
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tse_name##_PCS_SGMII, \
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msgdma_tx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_IRQ, \
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TSE_INT_DESC_MEM, \
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TSE_INT_DESC_MEM, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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phy_addres, \
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phy_cfg_fp \
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},
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/* Define whole TSE system (dedicated descriptor memory, use shared fifo, enable MDIO sharing on first MAC) */
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/* MDIO sharing not supported for Multi-channel MAC */
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#define TSE_SYSTEM_EXT_MEM_WITH_SHARED_FIFO_ENABLE_MDIO_SHARING(tse_name, offset, msgdma_tx_name, msgdma_rx_name, phy_addres, phy_cfg_fp, desc_mem_name, shared_fifo_tx_name, shared_fifo_rx_name, number_of_mac_mdio_sharing) { \
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tse_name##_BASE + offset, \
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tse_name##_TRANSMIT_FIFO_DEPTH, \
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tse_name##_RECEIVE_FIFO_DEPTH, \
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tse_name##_USE_MDIO, \
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tse_name##_ENABLE_MACLITE, \
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tse_name##_MACLITE_GIGE, \
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tse_name##_IS_MULTICHANNEL_MAC, \
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tse_name##_NUMBER_OF_CHANNEL, \
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TSE_ENABLE_MDIO_SHARING, \
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number_of_mac_mdio_sharing, \
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tse_name##_PCS, \
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tse_name##_PCS_SGMII, \
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msgdma_tx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_IRQ, \
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TSE_EXT_DESC_MEM, \
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desc_mem_name##_BASE, \
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TSE_USE_SHARED_FIFO, \
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shared_fifo_tx_name##_CONTROL_BASE, \
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shared_fifo_tx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_TX_DEPTH_DEFAULT, \
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shared_fifo_rx_name##_CONTROL_BASE, \
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shared_fifo_rx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_RX_DEPTH_DEFAULT, \
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phy_addres, \
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phy_cfg_fp \
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},
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/* Define whole TSE system (program memory as descriptor memory, use shared fifo, enable MDIO sharing on first MAC) */
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/* MDIO sharing not supported for Multi-channel MAC */
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#define TSE_SYSTEM_INT_MEM_WITH_SHARED_FIFO_ENABLE_MDIO_SHARING(tse_name, offset, msgdma_tx_name, msgdma_rx_name, phy_addres, phy_cfg_fp, shared_fifo_tx_name, shared_fifo_rx_name, number_of_mac_mdio_sharing) { \
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tse_name##_BASE + offset, \
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tse_name##_TRANSMIT_FIFO_DEPTH, \
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tse_name##_RECEIVE_FIFO_DEPTH, \
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tse_name##_USE_MDIO, \
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tse_name##_ENABLE_MACLITE, \
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tse_name##_MACLITE_GIGE, \
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tse_name##_IS_MULTICHANNEL_MAC, \
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tse_name##_NUMBER_OF_CHANNEL, \
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TSE_ENABLE_MDIO_SHARING, \
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number_of_mac_mdio_sharing, \
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tse_name##_PCS, \
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tse_name##_PCS_SGMII, \
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msgdma_tx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_IRQ, \
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TSE_INT_DESC_MEM, \
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TSE_INT_DESC_MEM, \
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TSE_USE_SHARED_FIFO, \
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shared_fifo_tx_name##_CONTROL_BASE, \
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shared_fifo_tx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_TX_DEPTH_DEFAULT, \
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shared_fifo_rx_name##_CONTROL_BASE, \
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shared_fifo_rx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_RX_DEPTH_DEFAULT, \
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phy_addres, \
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phy_cfg_fp \
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},
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/* Macro to define single component used by alt_tse_system_add_sys() */
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/* Define MAC of TSE system */
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#define TSE_SYSTEM_MAC(tse_name) \
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tse_name##_BASE, \
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tse_name##_TRANSMIT_FIFO_DEPTH, \
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tse_name##_RECEIVE_FIFO_DEPTH, \
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tse_name##_USE_MDIO, \
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tse_name##_ENABLE_MACLITE, \
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tse_name##_MACLITE_GIGE, \
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tse_name##_IS_MULTICHANNEL_MAC, \
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tse_name##_NUMBER_OF_CHANNEL, \
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tse_name##_MDIO_SHARED, \
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tse_name##_NUMBER_OF_MAC_MDIO_SHARED, \
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tse_name##_PCS, \
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tse_name##_PCS_SGMII
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/* Define MSGDMA of TSE system */
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#define TSE_SYSTEM_MSGDMA(msgdma_tx_name, msgdma_rx_name) \
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msgdma_tx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_NAME, \
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msgdma_rx_name##_CSR_IRQ
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/* Define descriptor memory of TSE system (dedicated descriptor memory) */
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#define TSE_SYSTEM_DESC_MEM(desc_mem_name) \
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TSE_EXT_DESC_MEM, \
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desc_mem_name##_BASE
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/* Define descriptor memory of TSE system (program memory as descriptor memory) */
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#define TSE_SYSTEM_NO_DESC_MEM() \
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TSE_INT_DESC_MEM, \
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TSE_INT_DESC_MEM
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/* Define shared fifo of TSE system (use shared fifo) */
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#define TSE_SYSTEM_SHARED_FIFO(shared_fifo_tx_name, shared_fifo_rx_name) \
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TSE_USE_SHARED_FIFO, \
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shared_fifo_tx_name##_CONTROL_BASE, \
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shared_fifo_tx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_TX_DEPTH_DEFAULT, \
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shared_fifo_rx_name##_CONTROL_BASE, \
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shared_fifo_rx_name##_FILL_LEVEL_BASE, \
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ALTERA_TSE_SHARED_FIFO_RX_DEPTH_DEFAULT
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/* Define shared fifo of TSE system (no shared fifo) */
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#define TSE_SYSTEM_NO_SHARED_FIFO() \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO, \
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TSE_NO_SHARED_FIFO
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/* Define PHY of TSE system */
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#define TSE_SYSTEM_PHY(phy_addres, phy_cfg_fp) \
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phy_addres, \
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phy_cfg_fp
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __ALTERA_AVALON_TSE_SYSTEM_INFO_H__ */
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